PWMing a PWM signal

[MacGyverS2000]

Can't remember if I asked this one before, but if I did, it was months ago and I've long forgotten any answer

Is PWMing the output of a SMPS going to cause problems?

My current designs PWM the output of a low current (<100mA) linear regulator. I would like to supply a much higher amount of current (3A+) for an upcoming project, so linear regsulators are out of the question due to power inneficiency (too much heat to dump). The only valid solution I can see is use a SMPS to get the high efficiency.

So, this SMPS would be PWMing the input voltage to create a lower output voltage at high current, but (and here's the questionable part) I would still need to PWM the output as before. Will my PWM of the output voltage cause any issues with the PWM of the SMPS (essentially causing a continual load/no-load situation on the output)?

My gut tells me things will be OK since the SMPS will be PWMing the input in the 100kHz+ range (probably 300-500kHz), whereas my own PWM signal will be toggling the output voltage at a rate of around 100 Hz, giving 3 orders of magnitude speed difference between one signal and the other.

Essentially, I'm worried about output voltage under/overshoot when I enable/disable the output 100 times a second. I don't need a rock-solid output, but I know the typical SMPS will have some of that upon power-up/down... a couple tenths of a volt should be sufficient.

Thanks!


Dan
Owner

http://www.Hi-TecDesigns.com

 

[itsmoked]

macqyvers; No way to tell. The correct answer to your question is: MAYBE.

Since there are dozens of conversion topologies for SMPS this answer cannot be generalized. I would layout my circuit to try to isolate the output from the PWM load thru an inductor or RC filter or ?. Then you could run the MonteCarlo on your system and jumper out the isolation if you find it's not required.

HOWEVER!
You say you don't care about a few tenths of a volt... This is interesting. It also means that your PWM load could possibly be run with an unregulated supply. Those suckers are efficient and cheap! Consider using an unregulated supply for your load and then regulate just the small amount of power your controls need.

 

[Madcow]

Should work.
Fan speed controllers do basicly the same thing.
I have a flyback smps runnig a fan controller at about 90hz.
Come to think about it , the fan is a pwm-ed load as well.

 

[sdmays]

Are you pulse width modulating the control of the assumed buck regulator, or are you making and breaking current to the load? It might be safer to modulate the control of the regulator, in fact I think there are plenty of buck regulators ICs that accept PWM control inputs (for tens to hundreds of Hertz).

Many buck ICs use a ~=1.23V feedback voltage to control the output. For example if you were bucking from ~=12V to 6V, you would use a resistor divider network to feed back 1.23V based on the output voltage. In place of the resistor divider network, you could use a digital potentiometer and control the output by varying the digi-pot...This would work equally well if you were creating a current source.

 

[itsmoked]

sdmays has a good point. You could possibly set up your SMPS to actually modulate its output voltage.

 

[MacGyverS2000]

A little more circuit detail. Max input voltage will be about 15V, output will be in the 3-4V range (again, current is around 3A). The output will be feeding several circuits, which will EACH need separate PWM control (each sinking between 0.5-1A). So, I'm making/breaking load current. Worst case scenario is making/breaking all circuits at once at full load.

A useful bit of info... I'm not PWMing the outputs to control voltage (no smoothing going on), I need to actually turn the individual circuits completely on/off. The output voltage for each circuit can vary a bt, as previously mentioned, but I must still be able to turn them full on/off at the (roughly) 100Hz rate.

This could be a costly experiment (time and money) if it fails to work, so I would like as many assurances as possible it's worth a go before I attempt it.

Thanks guys!


Dan
Owner

http://www.Hi-TecDesigns.com

 

[itsmoked]

Don't forget some SMPS require X minimum load at all times or they go nuts. If you are controlling the PWMs with a micro maybe you can stagger on times to prevent all three from hitting at once.

Now you are talking 3-4V range that's 1 volt of range! I still say an unregulated linear sounds possible. Not to mention 1/3 the cost. Bigger.

Since this is a trial you might consider using your basic garden variety PC power supply since they belt out at least 20A @ 5V and CPUs can be very on/off. (Some PC supplies require a light load all the time, some don't, so check that.)

 

[MacGyverS2000]

Do the canned solutions (chips from Maxim, TI , etc.) also require a minimum load?

The 3-4V range I mentioned was a rough estimate of what the actual load will be (still being designed), not the range of acceptable values. Once I determine the voltage required for the sub-circuits, I would like to keep the voltage swing to a couple tenths of a volt.

Linear regs are out of the question due to heat dissipation issues. At 3A and a 11V drop, that's 33W of power I'd have to dissipate in the regulator alone! Sorry, I just can't see that happening I expect about 85-90% efficiency from a good SMPS design (possibly a bit higher, if I'm lucky), so power dissipation drops down to 4-5W... still high, but acceptable under the circumstances.


Dan
Owner

http://www.Hi-TecDesigns.com

 

[itsmoked]

Oh you are stuck with a DC source? Then obviously my unregulated suggestions won't probably fly.

Designing around MAXIM SMPS chips is a mind bender. Give yourself plenty of time and look closely at ALL the details so you don't bumble down some dead end. I have, several times with them.

Often they take a zillion support parts that are relatively hard to come by.

I recommend you look closely for a DEMO board. Maxim has them for a lot of their controllers and they kick start a design a l o n g ways! They are also dirt cheap. They have one hefty stepdown that I think fits your spec except it is set to run at 5VDC. You can always mess with the setting components for that small a change. You get the whole thing laid out and assembled with those demos.

 

[walker1]

I have learned a lot using the design calculators at:

http://schmidt-walter.fbe.fh-darmstadt.de/smps_e/smps_e.html

You can specify input and output requirement, and it tells you coil size and even comes with sugestions for core (Siemens only)

 

[MacGyverS2000]

Yeah, due to the (relatively) high current requirements for such a small package size (<1" square), I'm trying to find a chip that will give me a fairly high PWM frequency. I figure anything in the 500+ MHz range should allow for a low-value inductor. I'm trading on size... the inductor needs to be beefy enough to handle the current, but still keeep it small enough to fit in the package, which means low inductance values.

I'm not stuck on any one brand of chip, just whatever does the job I need it to do. As with all of my products, I need them to be as tiny as possible while keeping reliability high in unknown environments. I'll probably order someone's reference design board in the next couple of weeks to start playing with something... if memory seves, they're usually in the $50 range, so that's pretty cheap.

I'll check out the calculator now...


Dan
Owner

http://www.Hi-TecDesigns.com

 

[Madcow]

http://www.national.com/appinfo/power/

I have had good luck with these guys and the web bench.
They sugest the lm2676. I think I would try the lm5642 (looks like more fun). Linear Tech. ,TI , Fairchild ect. have similar items.

 

[sdmays]

Okay, so you are designing one low voltage rail (3-4VDC) for multiple parrallel loads and you will be PWM'ing the loads individually with the chance of all loads being removed simultaneously. I say go for it...

I have been told such a thing is essentially not possible to do without trouble, but I think with careful design to take into account failure modes (open circuit mode, sudden change in load, etc...) you can build a successful design.

I have a decent idea of at least some of the things you design,...for this particular project, are you working with high wattage LED's? If so, I would suggest creating a 4V rail and using relatively small 'current limiting resistors' to account for differences from LED to LED. I am assuming you are using a buck converter. I can think of a hundred design things to consider, but I guess you should just keep a storage 'scope handy.

 

[MacGyverS2000]

sd,

You're right on track. I'm working on a high-wattage version of a current product, with a few extras thrown in. I intend to keep the rail as close to the max V_f as possible (plus about 0.7V), then use some high-current BJTs (the BJTs giving me (fairly) decent current control, rather than FETs and dropping resistors). Removes the need for dropping resistors (and the space), along with trying to pick a value that works across the board. I'm sure I'll run into a few pieces that have a V_f so high it bumps into the headroom of the BJT, but that's OK, I expect to lose a few here and there. Keeping the rail just above V_fmax + 0.7 should minimize power dissipation in the BJTs. I've done it before with great success, but it wasn't possible in the current line of products due to the much higher line (I have no control over that)... so I picked a useful resistor value and dropped the rest across the BJTs.

Yep, it's a buck, and I always have my DSO on the bench ready for testing new products.

Dan
Owner

http://www.Hi-TecDesigns.com

 

[sdmays]

With a DC-DC converter, the current is, of course, maintained at a fairly constant value by the inductor. If the load is suddenly removed, the inductor current will have nowhere to go (therefore the inductor voltage climbs without bounds). You will have to carefully watch for the outcome of this event.

Now then, some encouragement, a modern buck converter IC will probably be very fast (not only the switching frequency, but to compensate for the fast switching, it will have a very wide bandwidth), therefore it can respond very quickly to a loss of load in the ~=100Hz range. Bearing the speed of the buck IC in mind, you could place caps from the base of YOUR PWM BJT to ground to slow down the ON and OFF time of the BJT a small amount. Hopefully the buck IC can react and adjust to the 'slowly' changing load, etc...

 

[MacGyverS2000]

Yep, it's that voltage spike when the loads turn off that worries me and the main reason behind this thread. I've never spent any time working with SMPS stuff where the load was dropped, so I don't know the consequences. I suppose if the BJT has a high enough V_ce range and can handle a spike like that from the SMPS output, it won't be that large of an issue.

I suppose we're getting past the point of encouragement and right into the "This needs to be tried to find an answer" area.


Dan
Owner

http://www.Hi-TecDesigns.com

 

[sdmays]

I think limiting the ON and OFF time of the BJT's is something to consider, but there are some additional circuits you can use to absorb the extra energy from the inductor. I have been told BJT's are more 'forgiving' when it comes to voltage spikes than MOSFETs, and, as you mentioned above, the BJT can be used to control the LED current.

Anyway, I am anxious to hear the outcome of your "This needs to be tried to find an answer" experiment...

Steve.

 

[Madcow]

The energy from the inductor when you goto no load is
transfered to the output caps. by the diode or fet on the
low side of the buck. Same as when the upper fet is turned off. You will get some rise in the output but if you get alot of change then your inductor is too big, not enough caps. or your voltage loop is too slow. You can even put a small preload to get rid of the absolute no load case.

 

[OutToLunch]

If you properly design the buck regulator you should have absolutely no problems with the output of the buck regulator. All it takes is proper planning and a good knowlege of the load that the buck regulator will be servicing.

After choosing your buck controller IC, the first part you need to worry over is the bulk output capacitor bank (I say bank, but it could be as little as one capacitor). The output capacitors will hold up the rail while the inductor current slews up (or down) to the appropriate load level. At the onset of a load transient (be it either load application or removal) there will very likely be an associated spike on the output rail. This spike is a consequence of the ESR of the output cap bank and the ESL of the bank as well. You can estimate the magnitude of the spike with this formula:
dVtran = (ESR*Imax + ESL*dIload/dt)/Noc
where:
dVtran = magnitude of spike [V]
ESR = ESR of one output capacitor [ohms]
Imax = the max load applied [A]
ESL = ESL of one output capacitor [H]
dIload/dt = Load step slew rate [A/sec]
Noc = # of output capacitors
The ESL of a cap can be estimated between 1nH and 4nH as long as the board layout is tight.

You can go the other route and calculate the number of caps required (for a specific type of capacitor) by just rearranging the formula to solve for Noc and specifying a dVtran.

After the initial spike there may also be a sag (or a hump for a load release) in the output. You most likely won't have to worry much about this - especially if you said you can tolerate a deviation in the hundreds of millivolts. A good buck regulator should restrict any excursions to tens of millivolts.

Once you've got your output cap bank, select an inductor. The selection criteria of the inductor should be based on the amount of output voltage ripple you want (the AC ripple of the inductor in conjuction with the ESR of the output capacitors causes a ripple in the output voltage). The inductor value would then be:
L = (Vin-Vout)*(Vout/Vin)*(ESR/Noc)*(1/fs)*(1/Vripple)
where:
L = Calculated inductor value
Vin = Input voltage
Vout = Output Voltage
ESR = ESR of one output capacitor
Noc = # of output capacitors
fs = switching frequency
Vripple = desired output voltage ripple

After that, choose you FETs and input capacitors and then design your compensation network to make the system bandwidth as large as possible (limit is about 25% of fs) while maintaining stability. Do all this while keeping an eye on power dissipation.