Nonsinusoidal voltage and SMPS 1

[e573]

Dear Sirs,
can you help me in questions of the influence of input voltage distortion
(THD and odd and even harmonics) on SPMS operation? What levels of those
quantities is acceptable? What harmful consequences is due to high voltage harmonic level?
What literature (books, standards and Internet source is available on this item?

Thank you in advance.

 

[busbar]

http://grouper.ieee.org/groups/harmonic/

http://standards.ieee.org/reading/ieee/std_public/description/staticp/519-1992_desc.html

http://grouper.ieee.org/cgi-bin/netforum/ieee519/a/12

http://ece-

http://www.colorado.edu/~ecen5807/

 

[electricuwe]

There are some standards which give a limit for harmonic voltages which may be present on the line voltage and which have to be tolerated by an SMPS without malfunction. You will find these standards in the links given by busbar.

To my mind small power single phase SMPS without PFC circuit will usually tolerate much higher levels of voltage distortion compared to other equipment and will operate at levels much higher than given by the standards. The input circuit is basicly a diode rectifer with capacitive smoothing which will accept a heavily distorted voltage without complaint.

Depending on the phase of the harmonics, the harmonics might increase DC-link-voltage beyond design value. But the harmonics usually existing on line voltage tend to reduce DC-link voltage because usually distortion leads to a trapezoidal waveform and not to a triangular.

For SMPS including an PFC-cicuit or with three phase input, there might a greater susceptibilty to harmonic voltages.

 

[jbartos]

Suggestion: Since this aspect will vary from one SMPS to another SMPS, then probably the best condensed start may be found in:
Muhammad H. Rashid "Handbook of Power Electronics", Academic Press, 2001